Katika mifumo ya microwave na radio frequency, hasara za njia ya upitishaji, dispersion na mekanizimu kama skin effect zinaweza kusababisha amplitude ya signal kudhoofika kwa viwango tofauti kulingana na frequency. Matokeo yake, mwitikio wa amplitude ndani ya bendi wa amplifier, radar au communication chain hauwi tambarare tena. Amplitude equalizers hulenga kusawazisha mwitikio wa jumla wa frequency kwa kuongeza sifa ya attenuation inayodhibitiwa yenye mteremko wa kinyume na hasara inayotegemea frequency ya mfumo. Utafiti huu unaunganisha Bridge-T absorptive attenuator, LC frequency-selective network na sehemu ya optimized impedance matching kwenye teknolojia ya gallium arsenide integrated passive device (GaAs-IPD) ili kutengeneza equalizer inayofaa kwa RF microsystems ndogo sana. Mbinu ya design inapanuliwa kwa equalizers za single-resonance na dual-resonance; hata hivyo, prototype iliyotengenezwa na kupimwa kimwili ni ya single-resonance. Prototype inafanya kazi kati ya 0.1–2.35 GHz na ina ukubwa wa 0.8 mm × 0.7 mm × 0.1 mm pekee. Katika vipimo vilivyofanywa kwa Keysight N5247A vector network analyzer na GSG probes, minimum insertion loss ilikuwa 0.66 dB, maximum attenuation 4.06 dB na return loss ndani ya bendi ya kazi ilikuwa bora kuliko 13.3 dB. Katika full-wave electromagnetic model, minimum insertion loss ilihesabiwa kuwa 0.77 dB, equalization range 4.14 dB na return loss bora kuliko 14.3 dB. Ukaribu wa jumla kati ya kipimo na simulation unaonyesha kuwa utekelezaji wa GaAs-IPD unafanya kazi. Hata hivyo, sehemu ya Abstract ya chanzo inatoa measured return loss kuwa bora kuliko 15 dB, huku Experiment, Table 3 na Conclusion zikiripoti 13.3 dB; kwa hiyo 13.3 dB inapaswa kuchukuliwa kama thamani kuu ya majaribio.

Kwa nini amplitude equalizer inahitajika?

Katika RF transmission chain, si components zote za frequency zinazopata hasara sawa. Transmission line, material dispersion, skin effect na frequency characteristic ya active circuits zenyewe zinaweza kusababisha hasara kubwa zaidi katika baadhi ya frequencies. Matokeo yake, gain ya mfumo hubadilika kwa frequency na in-band flatness huharibika.

Amplitude equalizer hutatua tatizo hili si kwa kuzalisha gain zaidi, bali kwa kudhoofisha kwa kiwango kinachodhibitiwa frequencies zenye hasara ndogo. Hivyo attenuation curve ya equalizer na loss curve ya RF chain kuu zinaweza kufidiana.

Sehemu tatu kuu za architecture inayopendekezwa

Katika Figure 1–4 za chanzo, vipengele vitatu vya kiutendaji vya equalizer inayopendekezwa vinaonekana:

• Absorption attenuation unit: huamua kiwango cha msingi cha attenuation.
• Frequency selection unit: huamua resonance points na mteremko wa equalization unaotegemea frequency.
• Optimized impedance matching network: huboresha impedance matching ndani ya bendi.

Mgawanyo huu hutoa faida muhimu ya design. Kwa kuwa kiwango cha attenuation kinadhibitiwa hasa na resistor network, huku equalization slope ikidhibitiwa na thamani za LC, malengo haya mawili yanaweza kurekebishwa kwa kiasi kikubwa bila kutegemeana.

Bridge-T attenuator inafanyaje kazi?

Utafiti unachagua Bridge-T topology kati ya absorptive resistor networks kama L, T, π na Bridge-T. Sababu kuu ni uwezo wake wa kutoa attenuation inayodhibitiwa pamoja na impedance matching nzuri kwa wakati mmoja.

Characteristic impedance:

\[ R_0=Z_0 \]

huchukuliwa, na katika utafiti kwa kawaida:

\[ Z_0=50\ \Omega \]

hutumika.

Kwa attenuation inayotakiwa ya \(A\) dB, resistors huhesabiwa kama:

\[ R_1 = Z_0 \left( 10^{A/20}-1 \right) \]

na:

\[ R_2 = Z_0 \left( \frac{1} {10^{A/20}-1} \right) \tag{1} \]

.

Katika uhusiano huu, \(A\) inapoongezeka, thamani za resistors za Bridge-T network hubadilishwa ili kurekebisha kiwango cha msingi cha attenuation.

Frequency-selective network inafanyaje kazi?

Sehemu ya frequency-selective inaundwa na LC resonators. Resonance frequency ya msingi huamuliwa na:

\[ f= \frac{1} {2\pi\sqrt{LC}} \tag{2} \]

.

Utafiti unafafanua miundo miwili:

• single-resonance: LC resonance point moja,
• dual-resonance: resonance points mbili.

Muundo wa dual-resonance huruhusu udhibiti wa maumbo changamano zaidi ndani ya bendi kuliko muundo wa single-resonance. Hata hivyo, prototype ya kimwili katika makala hii ni ya single-resonance.

Ubunifu wa optimized matching network ni upi?

Katika circuit inayopendekezwa, thamani za inductors na capacitors katika matching network huchaguliwa kuwa sawa na zile katika sehemu ya frequency-selective:

\[ L_{g1}=L_{s1}, \qquad C_{g1}=C_{s1} \]

na katika hali ya dual-resonance:

\[ L_{g2}=L_{s2}, \qquad C_{g2}=C_{s2}. \]

Symmetry hii hupunguza idadi ya independent design parameters, hurahisisha optimization na husaidia kupunguza physical layout.

Mahusiano ya jumla ya design ya dual-resonance

Chanzo kinatoa kwa dual-resonance:

\[ L_{s1}=L_{g1} = \frac{Z_0} {K_1K_2\pi f_0} \]

\[ L_{s2}=L_{g2} = \frac{K_2Z_0} {K_1\pi f_0} \]

\[ C_{s1}=C_{g1} = \frac{K_1K_2Y_0} {4\pi f_0} \]

\[ C_{s2}=C_{g2} = \frac{K_1Y_0} {4K_2\pi f_0} \tag{3} \]

.

Hapa:

• \(Y_0=1/Z_0\): load admittance,
• \(f_0\): resonance frequency,
• \(K_1\): negative-slope parameter ya in-band equalization amplitude,
• \(K_2\): equalization bandwidth parameter.

Kwa muundo wa single-resonance, \(K_2=1\) huchukuliwa na:

\[ L_{s1}=L_{g1} = \frac{Z_0} {K_1\pi f_0} \]

\[ C_{s1}=C_{g1} = \frac{K_1Y_0} {4\pi f_0} \tag{4} \]

hupatikana.

Mifano mitano ya circuit inaonyesha nini?

Waandishi walihesabu single-resonance equalizers tano tofauti zenye resonance frequency ya \(f_0=1\) GHz ili kuonyesha mbinu ya design.

Simulations katika Figure 5 zinaonyesha kuwa thamani tofauti za attenuation na slope zinaweza kutengenezwa kwenye resonance frequency ileile. Tafsiri ya chanzo ni kwamba slope inaweza kurekebishwa hasa kwa LC parameters, huku kiwango cha attenuation kikidhibitiwa na resistor network.

Kwa nini GaAs-IPD ilichaguliwa?

GaAs-IPD inafaa kwa kuunganisha RF passive circuits katika eneo dogo kwa sababu ya substrate loss ya chini, Q-factor kubwa ya passive components na utendaji mzuri katika frequency za juu.

Figure 6 pia inaonyesha thin-film resistor layer; hata hivyo, Table 2 haitoi material na thickness yake kando.

Kwa nini spiral inductor ina umbo la mraba?

Waandishi wanaeleza kuwa octagonal na circular spiral structures zinaweza kinadharia kutoa Q-factor kubwa zaidi, lakini ni ngumu zaidi kwa fabrication na batch-to-batch consistency. Kwa sababu hii spiral ya mraba imechaguliwa.

Inductance hutolewa kutoka simulation admittance kwa:

\[ L= \frac{\operatorname{Im}(1/Y_{11})} {2\pi f} \tag{5} \]

.

Spiral hutengenezwa kwenye M2 metal layer, na lower connection kwenye M1. Polyimide PV layer hutumiwa kupunguza parasitic capacitance kati ya M1–M2; Defected Ground Structure (DGS) inayoundwa kwenye M0 ground plane inalenga kupunguza substrate capacitance na eddy-current loss.

MIM capacitor inatengenezwaje?

Capacitor hutengenezwa kwa kutumia N2 Si₃N₄ dielectric layer kati ya M1 na M2 metal electrodes. NM1 layer husaidia fine tuning ya capacitance, huku matumizi ya DGS chini ya M0 yakipunguza parasitic effects.

Chanzo kinachapisha kwa capacitance extraction:

\[ C= \frac{1} {2\pi f\operatorname{Im}(1/Y_{11})} \tag{6} \]

. Kwa kuwa sign/absolute-value convention haijaelezwa kando, equation hii haijabadilishwa na Verianla kwa namna inayozidi chanzo.

Mbinu na Matokeo

Malengo ya design ya physical prototype

Kwa prototype iliyotengenezwa, chanzo kinatoa:

.

Kutoka ideal circuit kwenda kwenye real electromagnetic model

Baada ya ideal lumped-element values kuamuliwa, real spiral inductors na MIM capacitors zilimodeliwa kwa Ansys HFSS Electronics Desktop 2020 R2. Wakati wa kuhamia kwenye physical layout, parasitic effects zisizokuwepo kwenye ideal circuit kama conductor loss, substrate coupling na distributed capacitance hujitokeza; kwa hiyo geometries zilirekebishwa upya kwa full-wave electromagnetic optimization.

Final 3D design ina:

0.8 mm × 0.7 mm × 0.1 mm

.

Matokeo ya EM simulation

Kuna tofauti ya jumla ya takribani 0.5 dB kati ya S21 response ya ideal circuit model na EM model. Waandishi wanaeleza tofauti hii kwa GaAs substrate dielectric loss na metal conductor ohmic loss.

Chip halisi ilipimwaje?

GaAs-IPD chip baada ya fabrication ilikamilika ilicharacterize kwa Keysight N5247A vector network analyzer na Cascade ACP ground-signal-ground probes.

Katika operating band ya 0.1–2.35 GHz, simulation na experiment kwa ujumla zinafuatana kwa karibu. Katika eneo la 3–6 GHz, deviations kubwa zaidi zilitokea; chanzo kilieleza hili kwa fabrication tolerance, material-parameter variation na measurement uncertainty.

Kwa nini 13.3 dB inatumika kwa return loss?

Sehemu ya Abstract ya chanzo inaripoti measured return loss kuwa bora kuliko 15 dB. Kinyume chake, Experiment, Table 3 na Conclusion zinatoa kuwa bora kuliko 13.3 dB. Kwa kuwa vyanzo vitatu tofauti vya matokeo vinaunga mkono thamani ileile ya 13.3 dB, Verianla hutumia 13.3 dB katika jedwali kuu la performance.

Ulinganisho na teknolojia za awali

Kwa hiyo dai kuu la utafiti si rekodi ya dunia kabisa katika metric moja. Nguvu ya GaAs-IPD equalizer inayopendekezwa ni kutoa mchanganyiko wenye uwiano kati ya miniaturization, insertion loss na impedance matching.

Matokeo yanayoungwa mkono na utafiti

• Bridge-T attenuation na LC frequency-selection networks zinaweza kuunganishwa kwa mafanikio ndani ya equalizer moja.
• Kiwango cha attenuation na equalization slope vinaweza kudhibitiwa kwa kiasi kikubwa kupitia circuit parameters tofauti.
• Symmetric LC matching network hupunguza idadi ya independent design parameters.
• Spiral inductor, MIM capacitor na thin-film resistor network zinaweza kuunganishwa kwenye multilayer chip moja ya GaAs-IPD.
• Physical prototype ya single-resonance ya 0.1–2.35 GHz ilitengenezwa na kupimwa kwa mafanikio.
• Minimum measured insertion loss ni 0.66 dB.
• Measured maximum attenuation ni 4.06 dB.
• Kulingana na Experiment/Table 3/Conclusion, measured return loss ni bora kuliko 13.3 dB.
• Chip ina ukubwa wa 0.8 × 0.7 × 0.1 mm pekee.
• Measured response na full-wave simulation response kwa ujumla zina matokeo yanayokaribiana ndani ya operating band.

Majumuisho yasiyoungwa mkono na utafiti

• Physical prototype ya dual-resonance topology haikutengenezwa wala kupimwa katika utafiti huu.
• Utafiti haukupima jinsi system flatness inavyoboreshwa equalizer ikiunganishwa kwenye real 5G, radar au satellite RF chain.
• Power-handling capacity haijaripotiwa kwa majaribio.
• Thermal drift na temperature stability havijatathminiwa.
• Wafer/process yield statistics hazijatolewa.
• Monte Carlo au process-corner robustness dhidi ya fabrication variations haijaripotiwa.
• Kauli ya 15 dB katika Abstract kuhusu return loss hailingani na 13.3 dB katika sehemu ya experiment.
• 4.14 dB EM equalization range na 4.06 dB measured maximum attenuation si metric ileile ya physical performance.
• Prototype hii si active au adaptive electronically reconfigurable equalizer.

Maelezo ya Chanzo na Mbinu

Utafiti asilia:A Miniaturized High-Performance Amplitude Equalizer Based on GaAs-IPD Technology.

Waandishi: Yi Zhang, Gan Liu, Mengjiang Xing, Xiaozhen Li, Huile Zhang na Zhiqing Yang.

Taasisi: Yangtze Delta Region Institute (Huzhou), University of Electronic Science and Technology of China; School of Electronic Science and Engineering, University of Electronic Science and Technology of China; School of Information Engineering, Kunming University; College of Information Science and Engineering, Henan University of Technology.

Mwandishi wa mawasiliano: Gan Liu.

DOI: 10.2139/ssrn.7208079.

SSRN ID: 7208079.

Hali ya uchapishaji: Kila ukurasa wa source PDF una kauli “Preprint not peer reviewed”. Kufikia tarehe ya tathmini hii, separate peer-reviewed final journal version chini ya title hiyo hiyo haijathibitishwa.

Aina ya utafiti: RF circuit topology development, analytical lumped-element design, full-wave electromagnetic simulation, GaAs-IPD chip fabrication na experimental S-parameter characterization inayotegemea vector-network-analyzer.

Simulation software: Ansys HFSS, Electronics Desktop 2020 R2.

Experimental equipment: Keysight N5247A vector network analyzer na Cascade ACP GSG probes.

Ufadhili: National Natural Science Foundation of China, Grant 62401199; S&T Special Program of Huzhou, Grant 2023GZ09.

Performance inconsistency ndani ya chanzo: Abstract hutumia “better than 15 dB” kwa measured return loss, huku Experiment, Table 3 na Conclusion zikitoa “better than 13.3 dB”. Verianla hutumia 13.3 dB kama thamani kuu ya majaribio kwa kuwa inaungwa mkono na sehemu tatu tofauti.

Figure-label note ndani ya chanzo: Figure 10(a) inaita muundo uliotengenezwa “low-pass chip equalizer”; hata hivyo, topology, title na tathmini yote ya majaribio ya makala inalenga amplitude equalizer.

Component-parameter note: Ingawa Figure 6 inaonyesha thin-film resistor R layer, Table 2 haitoi data tofauti ya material na thickness ya layer hiyo.

Utafiti wa awali unaohusiana: Utafiti wa 2025 wa Xiaodong Yang na wenzake, Wafer-Level Amplitude Equalizer Based on an Integrated Passive Device Process with Two Resonance Points for Wavy In-Band Transmission, Electronics 14(9), 1715, DOI 10.3390/electronics14091715, ni predecessor wa karibu wa GaAs-IPD equalizer kutoka kundi hilo hilo la utafiti. Utafiti mpya unaendeleza mstari huu kwa circuit decomposition tofauti, matching approach na lower measured insertion loss.

Upatikanaji wa data / mgongano wa maslahi: Katika maandishi ya kurasa saba yaliyopakiwa hakuna sehemu tofauti ya Data Availability au Conflict of Interest inayoonekana; kwa hiyo Verianla haijaongeza taarifa ambayo haipo katika chanzo.

Hakimiliki/matumizi ya picha: Source images za circuit schematics, GaAs-IPD cross-section, chip micrograph na S-parameter plots hazipaswi kunakiliwa moja kwa moja. Kwa Verianla, uhusiano wa Bridge-T + LC frequency selection + GaAs-IPD chip + simulation/measurement unapaswa kuchorwa upya kwa technical visual asilia.